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2021-07-11T12:22:17Z

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{{Infobox
| title = {{{name|<includeonly>{{PAGENAMEBASE}}</includeonly>}}}
| image = {{#invoke:InfoboxImage|InfoboxImage|image={{{image|}}}|size={{{image_size|}}}|sizedefault=frameless|alt={{{alt|}}}}}
| caption = {{{caption|}}}
| header1 = {{ #if: {{{produced-end|}}}{{{produced-start|}}}{{{created|}}}{{{soldby|}}}{{{designfirm|}}}{{{manuf1|}}}{{{cpuid|}}}{{{code|}}} | General information }}
| label2 = Launched
| data2 = {{{produced-start|}}}{{{created|}}}
| label3 = Discontinued
| data3 = {{{produced-end|}}}
| label4 = Marketed by
| data4 = {{{soldby|}}}
| label5 = Designed by
| data5 = {{{designfirm|}}}
| label6 = Common manufacturer(s)
| data6 = {{unbulleted list
| {{{manuf1|}}}
| {{{manuf2|}}}
| {{{manuf3|}}}
| {{{manuf4|}}}
| {{{manuf5|}}}
}}
| label11 = [[CPUID]] code
| data11 = {{{cpuid|}}}
| label12 = Product code
| data12 = {{{code|}}}
| header19 = {{ #if: {{{clock|}}}{{{slowest|}}}{{{fsb|}}}{{{fsb-slowest|}}}{{{hypertransport-slowest|}}}{{{qpi-slowest|}}}{{{dmi-slowest|}}}{{{data-width|}}}{{{address-width|}}}{{{virtual-width|}}} | Performance }}
| label20 = Max. [[Central processing unit|CPU]] [[clock rate]]
| data20 = {{#if:{{{clock|}}}|{{{clock}}}|{{#if:{{{slowest|}}}|{{{slowest}}} {{{slow-unit|GHz}}}}} {{#if:{{{fastest|}}}| to {{{fastest}}} {{{fast-unit|GHz}}}}}}}
| label21 = [[Front-side bus|FSB]] speeds
| data21 = {{#if:{{{fsb|}}}|{{{fsb}}}|{{#if:{{{fsb-slowest|}}}|{{{fsb-slowest}}} {{{fsb-slow-unit|GHz}}}}} {{#if:{{{fsb-fastest|}}}| to {{{fsb-fastest}}} {{{fsb-fast-unit|GHz}}}}}}}
| label22 = [[HyperTransport]] speeds
| data22 = {{#if:{{{hypertransport-slowest|}}}|{{{hypertransport-slowest}}} {{{hypertransport-slow-unit|GT/s}}}}} {{#if:{{{hypertransport-fastest|}}}| to {{{hypertransport-fastest}}} {{{hypertransport-fast-unit|GT/s}}}}}
| label23 = [[Intel QuickPath Interconnect|QPI]] speeds
| data23 = {{#if:{{{qpi-slowest|}}}|{{{qpi-slowest}}} {{{qpi-slow-unit|GT/s}}}}} {{#if:{{{qpi-fastest|}}}| to {{{qpi-fastest}}} {{{qpi-fast-unit|GT/s}}}}}
| label24 = [[Direct Media Interface|DMI]] speeds
| data24 = {{#if:{{{dmi-slowest|}}}|{{{dmi-slowest}}} {{{dmi-slow-unit|GT/s}}}}} {{#if:{{{dmi-fastest|}}}| to {{{dmi-fastest}}} {{{dmi-fast-unit|GT/s}}}}}
| label25 = Data width
| data25 = {{{data-width|}}}
| label26 = Address width
| data26 = {{{address-width|}}}
| label27 = Virtual address width
| data27 = {{{virtual-width|}}}
| header29 = {{ #if: {{{l1cache|}}}{{{l2cache|}}}{{{l3cache|}}}{{{l4cache|}}}{{{llcache|}}} | Cache }}
| label30 = L1 [[CPU cache|cache]]
| data30 = {{{l1cache|}}}
| label31 = L2 cache
| data31 = {{{l2cache|}}}
| label32 = L3 cache
| data32 = {{{l3cache|}}}
| label33 = L4 cache
| data33 = {{{l4cache|}}}
| label34 = Last level cache
| data34 = {{{llcache|}}}
| header38 = {{ #if: {{{application|}}}{{{size-from|}}}{{{microarch|}}}{{{arch|}}}{{{arch1|}}}{{{instructions|}}}{{{extensions|}}}{{{extensions1|}}} | Architecture and classification }}
| label39 = Application
| data39 = {{{application|}}}
| label40 = [[Technology node|Min. feature size]]
| data40 = {{#if:{{{size-from|}}}|{{{size-from|}}} {{#if:{{{size-to|}}}| to {{{size-to}}}}}}}
| label41 = Architecture
| data41 = {{{arch1|}}}
| label42 = [[Microarchitecture]]
| data42 = {{{microarch|}}}
| label43 = [[Instruction set architecture|Instruction set]]
| data43 = {{{arch|}}}
| label44 = Instructions
| data44 = {{{instructions|}}}
| label45 = Extensions
| data45 = {{unbulleted list
| {{{extensions|}}} 
| {{{extensions1|}}}
| {{{extensions2|}}}
| {{{extensions3|}}}
}}
| header49 = {{ #if: {{{transistors|}}}{{{transistors1|}}}{{{numcores|}}}{{{cores|}}}{{{cores1|}}}{{{gpu|}}}{{{co-processor|}}}{{{pack1|}}}{{{socket|}}}{{{sock1|}}} | Physical specifications }}
| label50 = [[Transistor count|Transistors]]
| data50 = {{unbulleted list
| {{{transistors|}}} 
| {{{transistors1|}}}
| {{{transistors2|}}}
| {{{transistors3|}}}
| {{{transistors4|}}}
| {{{transistors5|}}}
| {{{transistors6|}}}
| {{{transistors7|}}}
| {{{transistors8|}}}
}}
| label51 = [[Multi-core processor|Cores]]
| data51 = {{unbulleted list
| {{{numcores|}}}
| {{{cores|}}} 
| {{{cores1|}}}
| {{{cores2|}}}
| {{{cores3|}}}
| {{{cores4|}}}
| {{{cores5|}}}
}}
| label53 = [[Graphics processing unit|GPU(s)]]
| data53 = {{{gpu|}}}
| label54 = [[Co-processor]]
| data54 = {{{co-processor|}}}
| label55 = Package(s)
| data55 = {{unbulleted list
| {{{pack1|}}}
| {{{pack2|}}}
| {{{pack3|}}}
| {{{pack4|}}}
| {{{pack5|}}}
}}
| label56 = Socket(s)
| data56 = {{unbulleted list
| {{{socket|}}} 
| {{{sock1|}}}
| {{{sock2|}}}
| {{{sock3|}}}
| {{{sock4|}}}
| {{{sock5|}}}
| {{{sock6|}}}
| {{{sock7|}}}
| {{{sock8|}}}
| {{{sock9|}}}
}}
| header59 = {{ #if: {{{core1|}}}{{{pcode1|}}}{{{model|}}}{{{brand1|}}}{{{variant|}}} | Products, models, variants }}
| label60 = Core name(s)
| data60 = {{unbulleted list
| {{{core1|}}}
| {{{core2|}}}
| {{{core3|}}}
| {{{core4|}}}
| {{{core5|}}}
| {{{core6|}}}
| {{{core7|}}}
| {{{core8|}}}
| {{{core9|}}}
}}
| label61 = Product code name(s)
| data61 = {{unbulleted list
| {{{pcode1|}}}
| {{{pcode2|}}}
| {{{pcode3|}}}
| {{{pcode4|}}}
| {{{pcode5|}}}
| {{{pcode6|}}}
| {{{pcode7|}}}
| {{{pcode8|}}}
| {{{pcode9|}}}
}}
| label62 = Model(s)
| data62 = {{unbulleted list
| {{{model|}}} 
| {{{model1|}}}
| {{{model2|}}}
| {{{model3|}}}
| {{{model4|}}}
| {{{model5|}}}
| {{{model6|}}}
| {{{model7|}}}
| {{{model8|}}}
| {{{model9|}}}
}}
| label63 = Brand name(s)
| data63 = {{unbulleted list
| {{{brand1|}}}
| {{{brand2|}}}
| {{{brand3|}}}
| {{{brand4|}}}
| {{{brand5|}}}
| {{{brand6|}}}
| {{{brand7|}}}
| {{{brand8|}}}
| {{{brand9|}}}
}}
| label69 = Variant(s)
| data69 = {{unbulleted list
| {{{variant|}}} 
| {{{variant1|}}}
| {{{variant2|}}}
| {{{variant3|}}}
| {{{variant4|}}}
| {{{variant5|}}}
| {{{variant6|}}}
| {{{variant7|}}}
| {{{variant8|}}}
| {{{variant9|}}}
}}
| header70 = {{ #if: {{{predecessor|}}}{{{successor|}}} | History }}
| label71 = Predecessor
| data71 = {{{predecessor|}}}
| label72 = Successor
| data72 = {{{successor|}}}
}}<noinclude>{{documentation}}</noinclude>

Template:Infobox CPU - Revision history

FilipeFonseca: 1 revision imported